By R. M. M. Oberman (auth.)
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Additional info for Counting and Counters
Load and elear functions Flip-flops usually have special preset and clear inputs (active low) operating independently of the clock. These inputs overrule the data inputs. A 0 signal applied to the preset input of such a flip-flop brings it into the I state, and a 0 signal applied to the clear input brings it into the 0 state. So me counters use these types of inputs. These inputs are perhaps practical to bring a counter into a starting state (all zero state, or preset to a certain number), but it cannot be used as a step in an operating cyc1e oflimited length.
All flip-flops which are going to change their state on the next clock pulse, that are a number of adjacent flip-flops in the 1 state followed by the also adjacent least significant flip-flop in the 0 state, will then receive a 1 toggle signal. The least significant flip-flop (W, X, Y or Z) in the 0 state can now be detected by means of a two-input AND gate connected with the toggle signal and the Q output of the flip-flop. This is shown in the circuit of figure 2-23. AND gates 1,2 and 3 perform this function.
If no special switching means are provided, the carry propagation delay td in a 4-bit counter will increase to ntd in a 4n-bit counter. The carry propagation delays are generated in output gate 4 of the carry circuits in the 4-bit adders. Note that the critical point in the generation of the carry propagation delay sterns from the operation of the least significant flip-flop Z of the least significant 4-bit binary counter for counting cycles with an even number of steps, but that for counting cycles with an odd number of steps all flip-flops of the least significant 4-bit binary counter can be equally responsible.