By Fei Yuan
Time-mode circuits, the place details is represented by way of time distinction among electronic occasions, supply a potential and technology-friendly skill to achieve mixed-mode circuits and platforms in nanometer complementary metal-oxide semiconductor (CMOS) applied sciences. a number of architectures of time-based sign processing and layout ideas of CMOS time-mode circuits have emerged; although, an in-depth exam of the rules of time-based sign processing and layout recommendations of time-mode circuits has no longer been available―until now.
CMOS Time-Mode Circuits and platforms: basics and Applications is the 1st publication to convey a finished remedy of CMOS time-mode circuits and structures. that includes contributions from prime specialists, this authoritative textual content encompasses a wealthy number of literature on time-mode circuits and systems.
The publication starts off by way of featuring a serious comparability of voltage-mode, current-mode, and time-mode signaling for mixed-mode sign processing and then:
- Covers the basics of time-mode sign processing, corresponding to voltage-to-time converters, all-digital phase-locked loops, and frequency synthesizers
- Investigates the functionality features, structure, layout options, and implementation of time-to-digital converters
- Discusses time-mode delta-sigma-based analog-to-digital converters, putting an exceptional emphasis on time-mode quantizers
- Includes an in depth research of ultra-low-power built-in time-mode temperature dimension systems
CMOS Time-Mode Circuits and platforms: basics and Applications presents a helpful reference for circuit layout engineers, method engineers, graduate scholars, and others trying to grasp this fast-evolving field.
Read or Download CMOS Time-Mode Circuits and Systems: Fundamentals and Applications PDF
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Extra resources for CMOS Time-Mode Circuits and Systems: Fundamentals and Applications
Kim, W. Yu, and S. Cho. 5 b/stage pipelined time-todigital converter in 65 nm CMOS using time-register. IEEE Journal of Solid-State Circuits, 49(4):1007–1016, April 2014. )>>G. Gillette. The digiphase synthesizer. In Proceedings of 23rd Annual Frequency Control Symposium, 1969, Fort Monmouth, NJ, pp. 25–29. )>> J. Gibbs and R. Temple. Frequency domain yields its data to phase-locked synthesizer. Electronics, 27:107–113, April 1978. )>> V. Reinhardt. Spur reduction technique in direct digital synthesizer.
9 is linear. 4a . 4c. 4â•… (a) Voltage-to-time converter. (From Taillefer, C. , IEEE Trans. Circuits Syst. ) (b) Voltage-to-time converter. (From Konishi, T. , A 40-nm 640-μm2 45-dB opampless all-digital second-order MASH ΔΣ ADC, in Proceedings of IEEE International Symposium on Circuits and Systems, 2011, pp. ) the dependence of ic on vc introduces unwanted distortion. Konishi et al. 4a cannot be fully recovered to the supply voltage when ϕ = 0, resulting in the variation of the propagation delay .
Upon the assertion of ϕ = 1, v1,3,5,7,9 = VDD and v2,4,6,8,10 = 0. To simplify presentation, we assume that vk, k = 1, 2, …, 10, varies with time linearly. Further, we assume that all inverters have the same threshold voltage V T,inv. 12. When the gating voltage is changed from vin = Vin to vin+ = Vin + Dv, the delay of the current-starved inverters with a current sink will change from τ1 to τ1 − Δτ1. 14. 11â•… Time-mode comparator. (From Lee, S. , IEEE J. 12â•… Waveforms of time-mode comparator proposed by Lee et al.